Compensation · Listed in posting
$129,300 – $225,300
Apple is seeking a wireless MAC design engineer to develop microarchitecture and area- and power-efficient RTL for wireless communication SoCs. The role covers translating functional requirements into synthesizable Verilog or SystemVerilog, ensuring lint, CDC/RDC, and timing closure, supporting pre-silicon verification and post-silicon validation, and collaborating with systems, software, verification, emulation, and synthesis teams.
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