3DIC 良率分析与诊断工程师（资深级） at Qualcomm Semiconductor Limited

部门：ASICS Engineering

语言

工作方式: 现场办公
地点: 新竹，台湾
级别: staff+
发表: 2026年7月10日

说明

Qualcomm Semiconductor Limited 正在招聘一名资深级 3DIC 良率分析与诊断工程师，负责引领 2.5D、3DIC、芯粒和异构集成技术的良率学习与诊断工作。该职位将分析大规模半导体数据集，开发分析框架和仪表板，在晶圆、封装、组装及多芯片环境中开展根因分析，并应用统计建模、机器学习和 AI 改进预测性良率学习。该工程师将与产品工程、设计、测试、晶圆代工、封装、组装、可靠性团队及 OSAT 合作伙伴协作，支持 NPI 和大批量制造，同时推动系统性良率改进。

所需技能

良率分析
诊断
Python
JMP
SQL
Power BI
统计建模
机器学习
根因分析
DRAM 诊断

附加信息

Minimum Education: Bachelor's degree in Science, Engineering, or a related field with 4+ years of relevant experience; alternatively, a Master's degree with 3+ years or a PhD with 2+ years of relevant experience.
Required Previous Experiences: Experience in semiconductor yield analytics, diagnostics, and manufacturing data analysis
Experience driving yield improvement in high-volume manufacturing environments
Experience analyzing large-scale semiconductor datasets and developing data-driven solutions for complex yield challenges
Experience with semiconductor test methodologies, failure analysis, and yield learning processes
4+ years of ASIC design, verification, validation, integration, or related work experience
Preferred Qualifications: Deep understanding of 2.5D/3DIC architectures, chiplet integration, TSV/interposer technologies, hybrid bonding, and advanced packaging flows
Experience building and scaling yield analytics frameworks, diagnostics methodologies, and data infrastructure
Familiarity with process correlation, defect characterization, and failure-mechanism modeling
Experience working with advanced packaging, assembly, OSAT, and foundry manufacturing environments
Hands-on experience applying AI/ML techniques to semiconductor yield analytics and diagnostics
Experience with DRAM, HBM, and stacked-memory diagnostics
Knowledge of package reliability, failure analysis, and heterogeneous integration challenges
Demonstrated technical leadership and ability to drive cross-functional yield improvement initiatives