说明
Astera Labs 正在招聘一名积极主动的模拟混合信号版图实习生加入团队。该实习生将协助设计和绘制高性能模拟及混合信号 IP 模块的版图,并与经验丰富的工程师密切合作。主要职责包括协助版图设计,执行 LVS、DRC 和 PEX 检查,支持平面规划、布局、布线和匹配,优化版图以提升性能、节省面积并提高可靠性,以及记录版图工作。
Silicon-based hardware connectivity solutions and software for rack-scale AI.San Jose, CA, United States
Astera Labs builds silicon-based hardware connectivity solutions and software for rack-scale AI, including smart fabric switches, retimers, memory controllers, and signal conditioners. Astera Labs reported second-quarter 2026 revenue of $392.4 million, up 27% quarter over quarter and 104% year over year.