SiFive International, Inc. - Taiwan Branch

资深设计验证工程师 – 缓存验证 at SiFive International, Inc. - Taiwan Branch

语言

地点: 台湾新竹
职位类型: 全日制
级别: not_specified
发表: 2026年8月4日

说明

SiFive 正在寻找一位资深设计验证工程师，负责主导缓存与内存子系统功能的验证工作，重点关注缓存一致性（cache coherency）、时序/排序（ordering）、正确性以及集成。该独立贡献者岗位需要承担验证计划与执行的责任，开发健壮的测试环境，对复杂问题进行调试，并为改进验证方法学做出贡献。

所需技能

SystemVerilog
基于 UVM 的验证
缓存架构
内存层次结构
缓存一致性协议/行为
调试能力
覆盖率分析
约束随机验证
以指标驱动的签核（metrics-driven signoff）
计算机体系结构
微体系结构基础

附加信息

Required Previous Experiences: 7+ years of experience in ASIC, CPU, or SoC design verification, with strong hands-on ownership of complex verification problems at block or subsystem level.
Preferred Qualifications: Direct experience verifying multiple levels of cache, including private and shared cache structures.
Experience with cache coherency, memory consistency, weak ordering, and multicore verification challenges.
Experience with performance-oriented verification, formal techniques, or emulation/FPGA-assisted debug.
Familiarity with Python, C/C++, or scripting languages used for DV infrastructure and automation.
Ability to influence technical direction across architecture, design, and verification teams.
Translation Company Name: SiFive International, Inc. - Taiwan Branch

福利和津贴

签证担保

关于 SiFive

SiFive

RISC-V

SiFive delivers high-performance, scalable processor core IP solutions using the open RISC-V standard, with flexible customization and power efficiency. Its products include customizable scalar, vector, and matrix solutions, including scalable AI matrix engines for companies developing custom AI solutions and systems for edge IoT, consumer devices, autonomous vehicles, and data centers. SiFive IP powers over 2 billion devices worldwide and has achieved 400+ RISC-V design wins.

在招职位: 106
成立于: 2015

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