说明
Astera Labs 正在招聘一名需现场办公的 PCB 布局工程技术负责人,负责为 AI 和机器学习连接产品设计复杂 PCB。该职位涵盖高速接口、电源、高密度互连、信号完整性、电源完整性、DFT 和 DFM;要求拥有电气工程或类似领域的学士学位,至少 10 年复杂 PCB 相关经验,熟练掌握 PCIe、Ethernet、DDR、先进 HDI 技术,以及 Cadence Allegro、Polar SI9000、CAM350 和 AutoCAD 等 EDA 工具。
Silicon-based hardware connectivity solutions and software for rack-scale AI.San Jose, CA, United States
Astera Labs builds silicon-based hardware connectivity solutions and software for rack-scale AI, including smart fabric switches, retimers, memory controllers, and signal conditioners. Astera Labs reported second-quarter 2026 revenue of $392.4 million, up 27% quarter over quarter and 104% year over year.