Description
Apple is hiring a Design Verification Engineer to enable fully functional first silicon for IP designs. The role covers pre-silicon verification, including DV methodology, test planning, SystemVerilog/UVM environments, stimulus and checkers, test writing, debugging, coverage, RTL freeze sign-off, and tape-out readiness. The engineer will develop scalable test benches, track bugs and coverage, debug regressions, and use LLMs to improve verification efficiency. A BS degree in a technical subject and at least 10 years of relevant industry experience are required.
