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Junior FPGA Design Engineer at Evertz

Department: R&D

Language

Compensation

CA$60,000 – CA$85,000/yr

Location
Markham, Ontario
Type
Full-time
Level
entry
Posted

Description

Evertz is hiring a Junior FPGA Design Engineer for its Markham FPGA Design team to develop FPGA/MPSoC-based products, CPLD designs, and IP cores; contribute to subsystem specifications; and collaborate with hardware and software engineers on testing and debugging. The role requires a bachelor's degree in engineering or applied science, FPGA/CPLD design experience in VHDL or Verilog, experience with Vivado or Quartus, C or C++, and familiarity with Linux, Makefile workflows, Git or Subversion, and the bash shell. The position is full-time, Monday through Friday for 40 hours per week, with a salary range of $60,000 to $85,000 per year.

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